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UPD44165364 - (UPD44165084/184/364) 18M-BIT QDRII SRAM 4-WORD BURST OPERATION

Download the UPD44165364 datasheet PDF. This datasheet also covers the UPD44165084 variant, as both devices belong to the same (upd44165084/184/364) 18m-bit qdrii sram 4-word burst operation family and are provided as variant models within a single manufacturer datasheet.

General Description

technology using full CMOS six-transistor memory cell.

Key Features

  • 1.8 ± 0.1 V power supply and HSTL I/O.
  • DLL circuitry for wide output data valid window and future frequency scaling.
  • Separate independent read and write data ports with concurrent transactions.
  • 100% bus utilization DDR READ and WRITE operation.
  • Four-tick burst for reduced address frequency.
  • Two input clocks (K and /K) for precise DDR timing at clock rising edges only.
  • Two output clocks (C and /C) for precise flight time and clock sk.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (UPD44165084_NEC.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by NEC (now Renesas Electronics)

Part Number Description
UPD44165362 (UPD44165082/182/362) 18M-BIT QDRII SRAM 2-WORD BURST OPERATION
UPD44165082 (UPD44165082/182/362) 18M-BIT QDRII SRAM 2-WORD BURST OPERATION
UPD44165084 (UPD44165084/184/364) 18M-BIT QDRII SRAM 4-WORD BURST OPERATION
UPD44165182 (UPD44165082/182/362) 18M-BIT QDRII SRAM 2-WORD BURST OPERATION
UPD44165184 (UPD44165084/184/364) 18M-BIT QDRII SRAM 4-WORD BURST OPERATION

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
DATA SHEET MOS INTEGRATED CIRCUIT µPD44165084, 44165184, 44165364 18M-BIT QDRTMII SRAM 4-WORD BURST OPERATION Description The µPD44165084 is a 2,097,152-word by 8-bit, the µPD44165184 is a 1,048,576-word by 18-bit and the µPD44165364 is a 524,288-word by 36-bit synchronous quad data rate static RAM fabricated with advanced CMOS technology using full CMOS six-transistor memory cell. The µPD44165084, µPD44165184 and µPD44165364 integrates unique synchronous peripheral circuitry and a burst counter. All input registers controlled by an input clock pair (K and /K) are latched on the positive edge of K and /K. These products are suitable for application which require synchronous operation, high speed, low voltage, high density and wide bit configuration.