UPD4482161 Overview
The µPD4482161, µPD4482181, µPD4482321 and µPD4482361 integrate unique synchronous peripheral circuitry, 2-bit burst counter and output buffer as well as SRAM core. All input registers are controlled by a positive edge of the single clock input (CLK). The µPD4482161, µPD4482181, µPD4482321 and µPD4482361 are suitable for applications which require synchronous operation, high speed, low voltage, high density and wide...
UPD4482161 Key Features
- 3.3 V or 2.5 V core supply
- Synchronous operation
- Internally self-timed write control
- Burst read / write : Interleaved burst and linear burst sequence
- Fully registered inputs for flow through operation
- All registers triggered off positive clock edge
- 3.3 V or 2.5 V LVTTL patible : All inputs and outputs
- Fast clock access time : 6.5 ns (133 MHz), 7.5 ns (117 MHz), 8.5 ns (100 MHz)
- Asynchronous output enable : /G
- Burst sequence selectable : MODE