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UPD485506 Datasheet Line Buffer

Manufacturer: NEC (now Renesas Electronics)

Overview: DATA SHEET MOS INTEGRATED CIRCUIT µPD485506 LINE BUFFER 5K-WORD BY 16-BIT/10K-WORD BY.

General Description

The µPD485506 is a high speed FIFO (First In First Out) line buffer.

Word organization can be changed either 5,048 words by 16 bits or 10,096 words by 8 bits.

Its CMOS static circuitry provides high speed access and low power consumption.

Key Features

  • 5,048 words by 16 bits (Word mode) /10,096 words by 8 bits (Byte mode).
  • Asynchronous read/write operations available.
  • Variable length delay bits; 21 to 5,048 bits or 10,096 bits (Cycle time: 25 ns) 15 to 5,048 bits or 10,096 bits (Cycle time: 35 ns).
  • Power supply voltage VCC = 5.0 V ± 0.5 V.
  • Suitable for sampling two lines of A3 size paper (16 dots/mm).
  • All input/output TTL compatible.
  • 3-state output.
  • Full static operation;.

More Datasheets from NEC (now Renesas Electronics)

Part Number Description
UPD485505 LINE BUFFER
UPD488448 128 M-bit Direct Rambus DRAM
UPD4016 2048 x 8 Bit Static NMOS RAM
UPD4066B Quad Bilateral Switch
UPD4104 4096 x 1 STATIC NMOS RAM
UPD4104-1 4096 x 1 STATIC NMOS RAM
UPD4104-2 4096 x 1 STATIC NMOS RAM
UPD411 FULLY DECODED RANDOM ACCESS MEMORY
UPD411-1 FULLY DECODED RANDOM ACCESS MEMORY
UPD411-2 FULLY DECODED RANDOM ACCESS MEMORY

UPD485506 Distributor