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UPD8255 - PROGRAMMABLE PERIPHERAL INTERFACES

General Description

The 3-state, bidirectional, eight bit Data Bus Buffer (DO-D71 of the .uPD8255 and .uPD8255A-5 can be directly interfaced to the processor's system Data Bus (DO-D7)The Data Bus Buffer is controlled by execution of IN and OUT instructions by the processor.

Key Features

  • unique to each of the ports. Port A = An 8-bit data output latch/buffer and data input latch. Port B = An 8-bit data input/output latch/buffer and an 8-bit data input buffer.

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Part Number Description
UPD8255A Programmable Peripheral Interface
UPD8255A-5 PROGRAMMABLE PERIPHERAL INTERFACES
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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NEe Microcomputers, Inc. NE'C fLPD8255 fLPD8255A·5 PROGRAMMABLE PERIPHERAL INTERFACES D ESCR I PTI ON The IlPD8255 and IlPD8255A-5 are general purpose programmable INPUT/OUTPUT devices designed for use with the 8080A/8085A microprocessors. Twenty-four (24) I/O lines may be programmed in two groups of twelve (group I and group II) and used in three modes of operation. In the Basic mode, (MODE 0), each group of twelve I/O pins may be programmed in sets of 4 to be iniJut or output. In the Strobed mode, (MODE 1), each group may be programmed to have 8 lines of input or output. Three of the remaining four pins in each group are used for handshaking strobes and interrupt control signals.