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S7I161882M

Manufacturer: NETSOL

S7I161882M datasheet by NETSOL.

This datasheet includes multiple variants, all published together in a single manufacturer document.

S7I161882M datasheet preview

S7I161882M Datasheet Details

Part number S7I161882M
Datasheet S7I161882M S7I163682M Datasheet (PDF)
File Size 364.33 KB
Manufacturer NETSOL
Description 512Kx36 & 1Mx18 DDRII CIO BL2 SRAM
S7I161882M page 2 S7I161882M page 3

S7I161882M Overview

The.

S7I161882M Key Features

  • 1.8V+0.1V/-0.1V Power Supply. -DLL circuitry for wide output data valid window and future fre
  • mon data input/output bus
  • HSTL I/O
  • Full data coherency, providing most current data
  • Synchronous pipeline read with self timed late write
  • Registered address, control and data input/output
  • DDR (Double Data Rate) Interface on read and write ports
  • Fixed 2-bit burst for both read and write operation
  • Clock-stop supports to reduce current. -Two input clocks (K and K) for accurate DDR timing at clock
  • Simple depth expansion with no data contention. -Programmable output impedance

More Datasheets from NETSOL

View all NETSOL datasheets

Part Number Description
S7I161884M 512Kx36 & 1Mx18 DDRII CIO BL4 SRAM
S7I163682M 512Kx36 & 1Mx18 DDRII CIO BL2 SRAM
S7I163684M 512Kx36 & 1Mx18 DDRII CIO BL4 SRAM
S7I321882M 1Mx36 & 2Mx18 DDRII CIO BL2 SRAM
S7I321884M 1Mx36 & 2Mx18 DDRII CIO BL4 SRAM
S7I323682M 1Mx36 & 2Mx18 DDRII CIO BL2 SRAM
S7I323684M 1Mx36 & 2Mx18 DDRII CIO BL4 SRAM
S7I641882M 2Mx36 & 4Mx18 DDRII CIO BL2 SRAM
S7I641884M 2Mx36 & 4Mx18 DDRII CIO BL4 SRAM
S7I643682M 2Mx36 & 4Mx18 DDRII CIO BL2 SRAM

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