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NTE74LS76A Integrated Circuit TTL − Dual J−K Flip−Flop with Preset and Clear
Description: The NTE74LS76A is a dual J−K flip−flop in a 16−Lead plastic DIP type package that contains two independent negative−edge−triggered flip−flops. The J and K inputs must be stable one setup time prior to the high−to−low clock transitions for predictable operation. The preset and clear are asynchronous active low inputs. When low they override the clock and data inputs forcing the outputs to the steady state levels as shown in the function table.
Absolute Maximum Ratings: (Note 1) Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NTE74LS76A Datasheet
