PSMN3R5-30YL Datasheet | NXP Semiconductors

.. N-channel Trench MOS logic level FET Rev. 01 - 14 October 2008 Preliminary data sheet 1. Product profile 1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using Trench MOS technology. This product is designed and qualified for use in industrial and munications applications. 1.2 Features and benefits - High efficiency due to low switching and conduction losses - Suitable for logic level gate drive sources 1.3 Applications - Class-D amplifiers - DC-to-DC converters - Motor control - Server power supplies 1.4 Quick reference data Table 1. VDS ID Ptot Quick reference Conditions Tmb = 25 °C; VGS = 10 V; see Figure 1; Tmb = 25 °C; see Figure 2 [1] Symbol Parameter drain current total power dissipation gate-drain charge Min - Typ - Max 30 100 74 Unit V A W drain-source voltage Tj ≥ 25 °C; Tj ≤ 150 °C Dynamic characteristics QGD VGS = 4.5 V; ID = 10 A; VDS = 12 V; see Figure 14; see Figure 15 VGS = 10 V; ID = 15 A; Tj = 25 °C; see Figure 12 5 n C Static characteristics RDSon drain-source on-state resistance 2.2 3.5 mΩ [1] Continuous current is limited by package. NXP Semiconductors w w w . D a t a S h e e t 4 U . c o m N-channel Trench MOS logic level FET 2. Pinning...