BST72A
DESCRIPTION
N-channel enhancement mode vertical D-MOS transistor in TO-92 variant envelope and designed for use in telephone ringer circuits and for application with relay, high-speed and line-transformer drivers. FEATURES
- Direct interface to C-MOS, TTL, etc.
- High-speed switching
- No second breakdown QUICK REFERENCE DATA Drain-source voltage Drain-source voltage (non-repetitive peak; tp ≤ 2 ms) Gate-source voltage (open drain) Drain current (DC) Total power dissipation up to Tamb = 25 °C Drain-source ON-resistance ID = 150 m A; VGS = 5 V Transfer admittance ID = 200 m A; VDS = 5 V PINNING
- TO-92 VARIANT 1 = source 2 = gate 3 = drain PIN CONFIGURATION Yfs typ. RDS(on) typ. max. VDS VDS(SM) VGSO ID Ptot max. max. max. max. max.
80 V 100 V 20 V 300 m A 0.83 W
7 Ω 10 Ω
150 m S handbook, halfpage d
1 2 3 g
MAM146 s
Note: Various pinout configurations available.
Fig.1 Simplified outline and symbol.
April 1995
Philips Semiconductors
Product specification
N-channe...