BUK9MLL-55PLL Datasheet | NXP Semiconductors

.. Dual Trench PLUS logic level FET Rev. 01 - 14 May 2009 Product data sheet 1. Product profile 1.1 General description Dual N-channel enhancement mode field-effect power transistor in SO20. Device is manufactured using NXP High-Performance (HPA) Trench PLUS technology, featuring very low on-state resistance, integrated current sensing transistors and over temperature protection diodes. 1.2 Features and benefits - Integrated current sensors - Integrated temperature sensors 1.3 Applications - Lamp switching - Motor drive systems - Power distribution - Solenoid drivers 1.4 Quick reference data Table 1. Quick reference Conditions VGS = 5 V; ID = 5 A; Tj = 25 °C; see Figure 16; see Figure 17 Tj = 25 °C; VGS = 5 V; see Figure 18 Tj = 25 °C; VGS = 0 V; ID = 250 µA Min Typ 42.5 Max 50 Unit mΩ Symbol Parameter RDSon drain-source on-state resistance ratio of drain current to sense current Static characteristics, FET1 and FET2 ID/Isense 2430 55 - 2970 - A/A V V(BR)DSS drain-source breakdown voltage NXP Semiconductors .. Dual Trench PLUS logic level FET 2. Pinning information Table 2. Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Pinning information Symbol G1 IS1 D1 A1 C1 G2 IS2 D2 A2 C2 D2 KS2 S2 S2 D2 D1 KS1 S1 S1 D1 Description gate 1 current sense 1 drain 1 anode 1 cathode 1 gate 2 current sense 2 drain 2 anode 2 cathode 2 drain 2 Kelvin source 2 source 2 source 2 drain 2 drain 1 Kelvin source 1 source 1 source 1 drain 1 1 10 20 11 D1 A1 D2 A2 Simplified...