FEATURES
s s s s s Operates as a GTL to LVTTL sampling receiver or LVTTL to GTL driver 3.0 V to 3.6 V operation LVTTL I/O not 5 V tolerant Series termination on the LVTTL outputs of 30 Ω ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115, and 1000 V CDM per JESD22-C101 s Latch-up testing is done to JEDEC Standard JESD78 which exceeds 500 mA s Package offered: TSSOP28 Philips Semiconductors GTL2007 13-bit GTL to LVTTL translator with power good control 3. Quick reference data Table 1: Quick reference data Tamb = 25 °C Symbol tPLH tPHL Cio Parameter propagation delay; An-to-Bn or Bn-to-An input/output capacitance; A-to-B input/output capacitance; B-to-A Conditions CL = 50 pF; VCC = 3.3 V outputs disabled; VI and VO = 0 V or 3.0 V Min Typ 5.5 5.5 2.0 1.5 Max 3.0 2.5 Unit ns ns pF pF 4. Ordering information Table 2: Ordering information Tamb = −40 °C to +85 °C Type number GTL2007PW Topside mark GTL2007 Package Name TSSOP28 DESCRIPTION
plastic thin shrink small outl...
NXP Semiconductors
