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GTL2009 - 3-bit GTL Front-Side Bus frequency comparator

Datasheet Summary

Description

The GTL2009 is designed for the Nocona and Dempsey/Blackford dual Intel Xeon processor platforms to compare the Front-Side Bus (FSB) frequency settings and set the common FSB frequency at the lowest setting if both processor slots are occupied or the FSB setting of the occupied processor slot if onl

Features

  • s Compares FSB frequency inputs to set the lowest frequency as the common bus frequency. s Operates at a range of GTL signal levels s 3.0 V to 3.6 V operation s LVTTL I/O are not 5 V tolerant s Companion chip to GTL2006 and GTL2007 s ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101 s Latch-up testing is done to JEDEC Standard JESD78, which exceeds 500 mA s Available in TSSOP16 package Philips Semiconductors GTL2009 www. DataSheet4U. com.

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Datasheet Details

Part number GTL2009
Manufacturer NXP
File Size 118.06 KB
Description 3-bit GTL Front-Side Bus frequency comparator
Datasheet download datasheet GTL2009 Datasheet
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GTL2009 3-bit GTL Front-Side Bus frequency comparator Rev. 01 — 22 September 2005 www.DataSheet4U.com Product data sheet 1. General description The GTL2009 is designed for the Nocona and Dempsey/Blackford dual Intel Xeon processor platforms to compare the Front-Side Bus (FSB) frequency settings and set the common FSB frequency at the lowest setting if both processor slots are occupied or the FSB setting of the occupied processor slot if only one processor is being used. A default FSB frequency of 100 MHz is initially set upon power-up when VDD is greater than 1.5 V. Magnitude comparisons and frequency multiplexing to compute the common FSB frequency occurs when the two 3-bit FSB GTL inputs from the chip sets are valid.
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