HEF4505B datasheet by NXP Semiconductors.
| Part number | HEF4505B |
|---|---|
| Datasheet | HEF4505B_PhilipsSemiconductors.pdf |
| File Size | 96.04 KB |
| Manufacturer | NXP Semiconductors |
| Description | 64-bit/ 1-bit per word random access read/write memory |
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The HEF4505B is a 64-bit, 1-bit per word, fully decoded and pletely static, random access memory. The memory is strobed for reading or writing only when the strobe input (ST), chip enable inputs (CE1 and CE2) are HIGH simultaneously. The output data is available at the data output (DOUT) only when the memory is strobed, the read/write input (R/W) is HIGH and after the read access time has passed.
View all NXP Semiconductors datasheets
| Part Number | Description |
|---|---|
| HEF4502B | Strobed hex inverter/buffer |
| HEF4508B | Dual 4-bit latch |
| HEF4510B | BCD up/down counter |
| HEF4511B | BCD to 7-segment latch/decoder/driver |
| HEF4512B | 8-input multiplexer with 3-state output |
| HEF4514B | 1-of-16 decoder/demultiplexer with input latches |
| HEF4515B | 1-of-16 decoder/demultiplexer with input latches |
| HEF4516B | Binary up/down counter |
| HEF4517B | Dual 64-bit static shift register |
| HEF4518B | Dual BCD counter |
