Description
2.2.1 Power Supplies 2.2.2 Reset 2.2.3 32MHz Oscillator 2.2.4 Radio 2.2.5 Analogue Peripherals 2.2.6 Digital Input/Output
3 CPU
4 Memory Organisation
4.1 ROM 4.2 RAM 4.3 OTP eFuse Memory 4.4 External Memory
4.4.1 External Memory Encryption 4.5 Peripherals 4.6 Unused Memory Addresses
5 System Clocks
5.1 16MHz System Clock 5.1.1 32MHz Oscillator 5.1.2 24MHz RC Oscillator
5.2 32kHz System Clock 5.2.1 32kHz RC Oscillator 5.2.2 32kHz Crystal Oscillator 5.2.3 32kHz External Clock
6 Reset
6.1 Internal
Features
- an enhanced 32-bit RISC processor offering high coding efficiency through variable width instructions, a multi-stage instruction pipeline and low power operation with programmable clock speeds. It also includes a 2.4GHz IEEE802.15.4 compliant transceiver, 128kB of ROM, 128kB of RAM, and a rich mix of analogue and digital peripherals. The large memory footprint allows the device to run both a network stack (e. g. JenNet-IP) and an embedded.