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P5010 - QorIQ integrated communication processor

Product Overview

NXP

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P5010 QorIQ integrated communication processor by NXP - Datasheet Preview — Datasheet preview – P5010

Datasheet Details

Part number	P5010
Manufacturer	NXP
File Size	3.19 MB
Description	QorIQ integrated communication processor
Datasheet	P5010 Datasheet
Note	This datasheet PDF includes multiple part numbers: P5010, P5020. Please refer to the document for exact specifications by model.
Additional preview pages of the P5010 datasheet.

Product details

Features

Two e5500 Power Architecture cores (one on the P5010).
Each core has a backside 512-Kbyte L2 Cache with ECC.
Three levels of instructions: User, Supervisor, and Hypervisor.
Independent boot and reset.
Secure boot capability.
CoreNet fabric supporting coherent and non-coherent transactions amongst CoreNet endpoints.
2-Mbyte CoreNet platform cache with ECC (one on the P5010).
One 10-Gigabit Ethernet (XAUI) controller.

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Other Datasheets by NXP

P5020 - QorIQ integrated communication processor

Published: Sep 13, 2024 |