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PN5180A0ETC4J - High-performance multi-protocol full NFC frontend

This page provides the datasheet information for the PN5180A0ETC4J, a member of the PN5180 High-performance multi-protocol full NFC frontend family.

Datasheet Summary

Description

of the PN5180A0ET/C3 and PN5180A0ET/C4 is described in an addendum to this document.

Additional documents supporting a design-in of the PN5180 are available from NXP, this additional design-in information is not part of this document.

Features

  • Transmitter current up to 250 mA.
  • Dynamic Power Control (DPC) for optimized RF performance, even under detuned antenna conditions.
  • Adaptive Waveform Control (AWC) automatically adjusts the transmitter modulation for RF compliancy.
  • Adaptive Receiver Control (ARC) automatically adjusts the receiver parameters for always reliable communication.
  • Includes NXP ISO/IEC14443-A and Innovatron ISO/IEC14443-B intellectual property licensing rights.
  • Ful.

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Datasheet preview – PN5180A0ETC4J

Datasheet Details

Part number PN5180A0ETC4J
Manufacturer NXP
File Size 1.17 MB
Description High-performance multi-protocol full NFC frontend
Datasheet download datasheet PN5180A0ETC4J Datasheet
Additional preview pages of the PN5180A0ETC4J datasheet.

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Full PDF Text Transcription

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PN5180A0xx/C3,C4 High-performance multiprotocol full NFC frontend, supporting all NFC Forum modes Rev. 4.1 — 13 March 2023 Product data sheet 1 Introduction This document describes the functionality and electrical specification of the high-power NFC IC PN5180A0HN/ C3, PN5180A0ET/C3 with firmware versions equal or higher than FW3.A and PN5180A0HN/C4, PN5180A0ET/ C4 with firmware versions equal or higher than FW4.1. The package description of the PN5180A0ET/C3 and PN5180A0ET/C4 is described in an addendum to this document. Additional documents supporting a design-in of the PN5180 are available from NXP, this additional design-in information is not part of this document.
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