NXP Semiconductors SAA7201
Integrated MPEG2 AVG decoder
FEATURES
General● Uses single external Synchronous DRAM (SDRAM) organized as 1M × 16 interfacing at 81 MHz; compatible with the SDRAM ‘lite’ or ‘PC’
● Fast external CPU interface; 16-bit data + 8-bit address
● Dedicated input for audio and video data in PES or ES format; data input rate: ≤9 Mbytes/s in byte mode; ≤20 Mbit/s in bit serial mode; audio and/or video data can also serve as input via CPU interface
● Single 27 MHz external clock for time base reference and internal processing; all required decoding and presentation clocks are generated internally
● Internal system time base at 90 kHz can be synchronized via CPU port
● Flexible memory allocation under control of the external CPU enables optimized partitioning of memory for different tasks
● Boundary scan (JTAG) plus external SDRAM self test implemented
● Supply voltage 3.3 V
● Package 160 QFP. CPU relation
● 16-bit data, 8-bit address, or 16-bit multiplexed bus; Motorola and Intel mode supported
● Support for fast DMA transfer to either internal registers or external SDRAM
● Maximum sustained rate to the external SDRAM is 9 Mbytes/s.