TZA3004HL Datasheet | NXP Semiconductors

FEATURES - Data and clock recovery up to 622 Mbits/s (STM1/OC3 and STM4/OC12) - Differential data input with 2.5 m V peak-to-peak typical sensitivity - Differential CML (Current-Mode Logic) data and clock outputs with 50 Ω driving capability - Adjustable CML output level - Loop mode for system testing - BER related LOS detection - Few external ponents needed - LQFP48 plastic package - Power dissipation typical 370 m W - Single supply voltage. ORDERING INFORMATION TYPE NUMBER TZA3004HL PACKAGE NAME LQFP48 DESCRIPTION DESCRIPTION The TZA3004HL is a data and clock recovery IC intended for use in SDH (Synchronous Digital Hierarchy) and SONET (Synchronous Optical Network) systems. The circuit recovers data and extracts the clock signal from an ining bitstream up to 622 Mbits/s. It can be configured for use in STM1/OC3 and STM4/OC12 systems. APPLICATIONS - Data and clock recovery in STM1/OC3 and STM4/OC12 transmission systems (up to 622 Mbits/s). VERSION SOT313-2 plastic low profile quad flat package; 48 leads; body 7 × 7 × 1.4 mm 1998 Feb 09 Philips Semiconductors Objective specification SDH/SONET data and clock recovery unit STM1/4 OC3/12 BLOCK DIAGRAM TZA3004HL handbook, full pagewidth LOS 39 SEL155 30 FREQUENCY DIVIDER 1 4/16 AREF 48 ENL 1 42 43 45 DATA AND CLOCK OUTPUT 46 6 7 3 4 DCSQ DOUT DOUTQ COUT COUTQ DLOOP DLOOPQ CLOOP CLOOPQ 33 DIN 34 DINQ ALEXANDER PHASE DETECTOR TZA3004HL enable 21 22 FREQUENCY WINDOW DETECTOR (1000 ppm) CREF CREFQ + ∫ dt 130 p F proportional path VCRO integrating path 130 p F POWER CONTROL 37 2, 5, 8, 10, 11, 14, 17, 20, 23, 26, 29, 32, 35, 38, 41, 44, 47 FREQUENCY DIVIDER 2 64/128 12 LOCK 9 REF19 24 REF39 16...