UJA1164TK
description
The UJA1164 is a mini high-speed CAN System Basis Chip (SBC) containing an ISO 11898-2/5 pliant HS-CAN transceiver and an integrated 5 V/100 m A supply for a microcontroller. It also features a watchdog and a Serial Peripheral Interface (SPI). The UJA1164 can be operated in a very low-current Standby mode with bus wake-up capability and supports ISO 11898-6 pliant autonomous CAN biasing.
The UJA1164 implements the standard CAN physical layer as defined in the current ISO11898 standard (-2 and -5). Pending the release of the updated version of ISO11898 including CAN FD, additional timing parameters defining loop delay symmetry are included. This implementation enables reliable munication in the CAN FD fast phase at data rates up to 2 Mbit/s.
A number of configuration settings are stored in non-volatile memory, allowing the SBC to be adapted for use in a specific application. This makes it possible to configure the power-on behavior of the UJA1164 to meet the requirements of...
