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NT5DS32M4AW Datasheet (nt5dsxxmxax) 128mb Ddr333/300 Sdram

Manufacturer: Nanya Technology

Overview: .. NT5DS32M4AT NT5DS32M4AW NT5DS16M8AT NT5DS16M8AW 128Mb DDR333/300.

This datasheet includes multiple variants, all published together in a single manufacturer document.

General Description

The 128Mb DDR SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits.

It is internally configured as a quad-bank DRAM.

Read or Write mand are used to select the bank and the starting column location for the burst access.

Key Features

  • CAS Latency and Frequency Maximum Operating Frequency (MHz).
  • DDR333 DDR300 (-6) (-66) 2 133 133 2.5 166 150.
  • Values are nominal (exact tCK should be used). CAS Latency.
  • Double data rate architecture: two data transfers per clock cycle.
  • Bidirectional data strobe (DQS) is transmitted and received with data, to be used in capturing data at the receiver.
  • DQS is edge-aligned with data for reads and is centeraligned with data for writes.
  • Differential clock.

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