Datasheet Summary
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NT5DS32M4AT NT5DS16M8AT
128Mb Double Data Rate SDRAM Features
CAS Latency and Frequency
Maximum Operating Frequency (MHz)- DDR266A DDR266B DDR200 (-7K) (-75B) (-8B) 2 133 100 100 2.5 143 133 125
- Values are nominal (exact tCK should be used). CAS Latency
- Double data rate architecture: two data transfers per clock cycle
- Bidirectional data strobe (DQS) is transmitted and received with data, to be used in capturing data at the receiver
- DQS is edge-aligned with data for reads and is centeraligned with data for writes
- Differential clock inputs (CK and CK)
- Four internal banks for concurrent operation
- Data mask (DM) for write data
- DLL aligns DQ and DQS...
