NT5DS64M4CS Overview
Description
NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT, NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS, and NT5DS16M16CG are die C of 256Mb SDRAM devices based using DDR interface. They are all based on Nanya’s 110 nm design process.
Key Features
- DDR 256M bit, die C, based on 110nm design rules
- Double data rate architecture: two data transfers per clock cycle
- Bidirectional data strobe (DQS) is transmitted and received with data, to be used in capturing data at the receiver
