54ABT16373 Datasheet | National Semiconductor

54ABT16373 16-Bit Transparent Latch with TRI-STATE Outputs July 1998 54ABT16373 16-Bit Transparent Latch with TRI-STATE ® Outputs General Description The ABT16373 contains sixteen non-inverting latches with TRI-STATE outputs and is intended for bus oriented applications. The device is byte controlled. The flip-flops appear transparent to the data when the Latch Enable (LE) is HIGH. When LE is low, the data that meets the setup time is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH, the outputs are in high Z state. Features n Separate control logic for each byte n 16-bit version of the ABT373 n High impedance glitch free bus loading during entire power up and power down cycle n Non-destructive hot insertion capability n Guaranteed latch-up protection n Standard Microcircuit Drawing (SMD) 5962-9320001 Ordering Code: Military 54ABT16373W-QML Package Number WA48A 48-Lead Cerpack Package Description Logic Symbol Connection Diagram Pin Assignment for Cerpack DS100201-1 Pin Description Pin Names OEn LEn D0- D15 O0- O15 Description Output Enable Input (Active Low) Latch Enable Input Data Inputs Outputs DS100201-2 TRI-STATE ® is a registered trademark of National Semiconductor Corporation. © 1998 National Semiconductor Corporation DS100201 .national. Functional Description The ABT16373 contains sixteen D-type latches with TRI-STATE standard outputs. The device is byte controlled with each byte functioning identically, but independent of the other. Control pins can be shorted together to obtain full 16-bit operation. The following description applies to each byte. When the Latch Enable (LEn) input is HIGH, data on the Dn enters the latches. In this condition the latches are transparent, i.e., a latch output will change states each time its D input changes. When LEn is LOW, the latches store information that was present on the D inputs a setup time preceding the HIGH-to-LOW transition of LEn. The TRI-STATE standard...