GENERAL DESCRIPTION
The device is byte controlled. The flip-flops appear transparent to the data when the Latch Enable (LE) is HIGH. When LE is low, the data that meets the setup time is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH, the outputs are in high Z state. FEATURES
n Separate control logic for each byte n 16-bit version of the ABT373 n High impedance glitch free bus loading during entire power up and power down cycle n Non-destructive hot insertion capability n Guaranteed latch-up protection n Standard Microcircuit Drawing (SMD) 5962-9320001 Ordering Code: Military 54ABT16373W-QML Package Number WA48A 48-Lead Cerpack Package DESCRIPTION
Logic Symbol Connection Diagram Pin Assignment for Cerpack DS100201-1 Pin DESCRIPTION
Pin Names OEn LEn D0–D15 O0–O15 DESCRIPTION
Output Enable Input (Active Low) Latch Enable Input Data Inputs Outputs DS100201-2 TRI-STATE ® is a registered trademark of National Semiconductor Corporation. © 1998 National Semiconductor Corporation DS100201 Functional DESCRIPTION
The ABT16373 contains sixteen D-type latches with TRI-STATE standard outputs.
National Semiconductor
