54ABT16374 Datasheet | National Semiconductor

54ABT16374 16-Bit D Flip-Flop with TRI-STATE Outputs July 1998 54ABT16374 16-Bit D Flip-Flop with TRI-STATE ® Outputs General Description The ABT16374 contains sixteen non-inverting D flip-flops with TRI-STATE outputs and is intended for bus oriented applications. The device is byte controlled. A buffered clock (CP) and Output Enable (OE) are mon to each byte and can be shorted together for full 16-bit operation. Features Separate control logic for each byte 16-bit version of the ABT374 Edge-triggered D-type inputs Buffered Positive edge-triggered clock High impedance glitch free bus loading during entire power up and power down cycle n Non-destructive hot insertion capability n Guaranteed latch-up protection n Standard Microcircuit Drawing (SMD) 5962-9320101 n n n n n Ordering Code: mercial 54ABT16374W-QML Package Number WA48A 48-Lead Cerpack Package Description Connection Diagram Pin Assignment for Cerpack Logic Symbol DS100224-1 Pin Description Pin Names OEn CPn D0- D15 O0- O15 TRI-STATE Output Enable Input (Active Low) Clock Pulse Input (Active Rising Edge) Data Inputs TRI-STATE Outputs Description DS100224-2 TRI-STATE ® is a registered trademark of National Semiconductor Corporation. © 1998 National Semiconductor Corporation DS100224 .national. Print Date=1998/07/14 Print Time=11:05:34 43604 ds100224 Rev. No. 1 cmserv Proof Functional Description The ABT16374 consists of sixteen edge-triggered flip-flops with individual D-type inputs and TRI-STATE true outputs. The device is byte controlled with each byte functioning identically, but independent of the other. The control pins can be shorted together to obtain full 16-bit operation. Each byte has a buffered clock and buffered Output Enable mon to all flip-flops within that byte. The description which follows applies to each byte. Each flip-flop will store the state of their individual D inputs that meet the setup and hold time requirements on the LOW-to-HIGH Clock...