GENERAL DESCRIPTION
n Guaranteed simultaneous switching, noise level and dynamic threshold performance n Guaranteed latchup protection n High impedance glitch free bus loading during entire power up and power down cycle n Nondestructive hot insertion capability n Disable time less than enable time to avoid bus contention n Standard Microcircuit Drawing (SMD) 5962-9214701 FEATURES
n Non-inverting buffers n Output sink capability of 48 mA, source capability of 24 mA n Output switching specified for both 50 pF and 250 pF loads Ordering Code Military 54ABT244J-QML 54ABT244W-QML 54ABT244E-QML Package Number J20A W20A E20A 20-Lead Ceramic Dual-In-Line 20-Lead Cerpack 20-Lead Ceramic Leadless Chip Carrier, Type C Package DESCRIPTION
Connection Diagrams Pin Assignment for DIP and Flatpak Pin Assignment for LCC DS100203-2 DS100203-1 Pin Names OE1, OE2 I0–I7 O0–O7 DESCRIPTION
Output Enable Input (Active Low) Inputs Outputs Truth Table OE1 H L L I0–3 X H L O0–3 Z H L OE2 H L L I4–7 X H L O4–7 Z H...
National Semiconductor
