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74LS74A - Dual Positive-Edge-Triggered D Flip-Flops

Datasheet Summary

Description

This device contains two independent positive-edge-triggered D flip-flops with complementary outputs The information on the D input is accepted by the flip-flops on the positive going edge of the clock pulse The triggering occurs at a voltage level and is not directly related to the transition time

Features

  • Y Alternate military aerospace device (54LS74) is available Contact a National Semiconductor Sales Office Distributor for specifications Connection Diagram Dual-In-Line Package Function Table TL F 6373.
  • 1 Order Number 54LS74DMQB 54LS74FMQB 54LS74LMQB DM54LS74AJ DM54LS74AW DM74LS74AM or DM74LS74AN See NS Package Number E20A J14A M14A N14A or W14B Inputs Outputs PR CLR CLK D Q Q L H X X H L H L X X L H L L X X H H H H uH H L H H u L L H H H L X.

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Datasheet Details

Part number 74LS74A
Manufacturer National Semiconductor
File Size 126.18 KB
Description Dual Positive-Edge-Triggered D Flip-Flops
Datasheet download datasheet 74LS74A Datasheet
Additional preview pages of the 74LS74A datasheet.

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54LS74 DM54LS74A DM74LS74A Dual Positive-Edge-Triggered D Flip-Flops with Preset Clear and Complementary Outputs June 1989 54LS74 DM54LS74A DM74LS74A Dual Positive-Edge-Triggered D Flip-Flops with Preset Clear and Complementary Outputs General Description This device contains two independent positive-edge-triggered D flip-flops with complementary outputs The information on the D input is accepted by the flip-flops on the positive going edge of the clock pulse The triggering occurs at a voltage level and is not directly related to the transition time of the rising edge of the clock The data on the D input may be changed while the clock is low or high without affecting the outputs as long as the data setup and hold times are not violated A low logic level on the preset or clear inputs wi
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