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ADC14C065 - A/D Converter

Datasheet Summary

Description

NOTE: This is Advance Information for products currently in development.

ALL specifications are design targets and are subject to change.

Features

  • n n n n n n n n n n 1 GHz Full Power Bandwidth Internal sample-and-hold circuit Low power consumption Internal precision reference Data Ready output clock Clock Duty Cycle Stabilizer Single +3.3V supply operation Power-down mode Offset binary or 2’s complement output data format 32-pin LLP package, (5x5x0.8mm, 0.5mm pin-pitch) Key Specifications n n n n n n n For ADC14C105 Resolution Conversion Rate SNR (fIN = 240 MHz) SFDR (fIN = 240 MHz) Full Power Bandwidth Power Consumption 14 Bits 105 MSPS.

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Full PDF Text Transcription

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ADC14C065/ADC14C080/ADC14C095/ADC14C105 14-Bit, 65/80/95/105 MSPS A/D Converter ADVANCE INFORMATION September 2006 ADC14C065/ADC14C080/ADC14C095/ADC14C105 14-Bit, 65/80/95/105 MSPS A/D Converter General Description NOTE: This is Advance Information for products currently in development. ALL specifications are design targets and are subject to change. The ADC14C065, ADC14C080, ADC14C095, and ADC14105 are high-performance CMOS analog-to-digital converters capable of converting analog input signals into 14-bit digital words at rates up to 65/80/95/105 Mega Samples Per Second (MSPS) respectively.
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