CD4015BC Datasheet PDF - National Semiconductor Dual 4-Bit Static Shift Register Specs

CD4015BC - Dual 4-Bit Static Shift Register

Datasheet Summary

Description

The CD4015BM CD4015BC contains two identical 4-stage serial-input parallel-output registers with independent ‘‘Data’’ ‘‘Clock ’’ and ‘‘Reset’’ inputs The logic level present at the input of each stage is transferred to the output of that stage at each positive-going clock transition A logic high on

Features

Y Y Y Y Y Wide supply voltage range High noise immunity Low power TTL compatibility Medium speed operation Fully static design 3 0V to 18V 0 45 VDD (typ ) Fan out of 2 driving 74L or 1 driving 74LS 8 MHz (typ ) clock rate VDD b VSS e 10V.

Datasheet Details

Part number	CD4015BC
Manufacturer	National Semiconductor
File Size	134.32 KB
Description	Dual 4-Bit Static Shift Register
Datasheet	CD4015BC Datasheet
Additional preview pages of the CD4015BC datasheet.

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CD4015BM CD4015BC Dual 4-Bit Static Shift Register June 1996 CD4015BM CD4015BC Dual 4-Bit Static Shift Register General Description The CD4015BM CD4015BC contains two identical 4-stage serial-input parallel-output registers with independent ‘‘Data’’ ‘‘Clock ’’ and ‘‘Reset’’ inputs The logic level present at the input of each stage is transferred to the output of that stage at each positive-going clock transition A logic high on the ‘‘Reset’’ input resets all four stages covered by that input All inputs are protected from static discharge by a series resistor and diode clamps to VDD and VSS Features Y Y Y Y Y Wide supply voltage range High noise immunity Low power TTL compatibility Medium speed operation Fully static design 3 0V to 18V 0 45 VDD (typ ) Fan out of 2 driving 74L or 1 dri

Published: Mar 23, 2005 |