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DP8459 - All-Code Data Synchronizer

Description

The DP8459 Data Synchronizer is an integrated phase locked loop circuit which has been designed for application in magnetic hard disk, flexible (floppy) disk, optical disk, and tape drive memory systems for data re-synchronization and clock recovery with any standard recording code, operating to 25 Mb

Features

  • n n n n n n n n n n n Fully integrated dual-gain PLL Zero phase start lock sequence 250 Kbit/sec.
  • 25 Mbit/sec data rate range Frequency lock capability (optional) for all standard recording codes Digital window strobe control, 5-bit resolution Two-port PLL filter network PLL free-run (Coast) control for optical disk defects Synchronization pattern (preamble lock) detection Non-glitching multiplexed read/write clock output +5V supply DP8459 supplied in 28-pin plastic chip carrier (PCC) and.

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Datasheet Details

Part number DP8459
Manufacturer National Semiconductor
File Size 403.77 KB
Description All-Code Data Synchronizer
Datasheet download datasheet DP8459 Datasheet
Additional preview pages of the DP8459 datasheet.

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Full PDF Text Transcription

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DP8459 All-Code Data Synchronizer DP8459 ADVANCED December 1995 DP8459 All-Code Data Synchronizer General Description The DP8459 Data Synchronizer is an integrated phase locked loop circuit which has been designed for application in magnetic hard disk, flexible (floppy) disk, optical disk, and tape drive memory systems for data re-synchronization and clock recovery with any standard recording code, operating to 25 Mb/s. The DP8459 is provided in a 28-pin PCC package. Zero phase start is employed during both data and reference clock lock sequences for rapid acquisition.
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