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DS90CF388A - Dual Pixel LVDS Display Interface/FPD-Link

This page provides the datasheet information for the DS90CF388A, a member of the DS90C387A Dual Pixel LVDS Display Interface/FPD-Link family.

Datasheet Summary

Description

The DS90C387A/DS90CF388A transmitter/receiver pair is designed to support dual pixel data transmission between Host and Flat Panel Display up to QXGA resolutions.

Features

  • n Supports SVGA through QXGA panel resolutions n 32.5 to 112/170MHz clock support n Drives long, low cost cables n Up to 5.7 Gbps bandwidth n Pre-emphasis reduces cable loading effects n Dual pixel architecture supports interface to GUI and timing controller; optional single pixel transmitter inputs support single pixel GUI interface n Transmitter rejects cycle-to-cycle jitter n 5V tolerant on data and control input pins n Programmable transmitter data and control strobe select (rising or fallin.

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Datasheet Details

Part number DS90CF388A
Manufacturer National Semiconductor
File Size 798.41 KB
Description Dual Pixel LVDS Display Interface/FPD-Link
Datasheet download datasheet DS90CF388A Datasheet
Additional preview pages of the DS90CF388A datasheet.

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Full PDF Text Transcription

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DS90C387A/DS90CF388A Dual Pixel LVDS Display Interface / FPD-Link February 2006 DS90C387A/DS90CF388A Dual Pixel LVDS Display Interface / FPD-Link General Description The DS90C387A/DS90CF388A transmitter/receiver pair is designed to support dual pixel data transmission between Host and Flat Panel Display up to QXGA resolutions. The transmitter converts 48 bits (Dual Pixel 24-bit color) of CMOS/TTL data and 3 control bits into 8 LVDS (Low Voltage Differential Signalling) data streams. At a maximum dual pixel rate of 112MHz, LVDS data line speed is 784Mbps, providing a total throughput of 5.7Gbps (714 Megabytes per second). The LDI chipset is improved over prior generations of FPDLink devices and offers higher bandwidth support and longer cable drive.
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