74F273 - Octal D Flip-Flop

Product Overview

National

Datasheet Details

Part number	74F273
Manufacturer	National
File Size	167.19 KB
Description	Octal D Flip-Flop
Datasheet	74F273 Datasheet
Additional preview pages of the 74F273 datasheet.

Product details

Description

The ’F273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously The register is fully edge-triggered The state of each D input one setup time before the LOW-to-HIGH clock transition is transferred to the corresponding flip-flop’s Q output All outputs will be forced LOW independently of Clock or Data inputs by a LOW voltage level on the MR input The device i

Features

Y Y Y Y Y Y Y Y Ideal buffer for MOS microprocessor or memory Eight edge-triggered D flip-flops Buffered common clock Buffered asynchronous Master Reset See ’F377 for clock enable version See ’F373 for transparent latch version See ’F374 for TRI-STATE version Guaranteed 4000V minimum ESD protection Commercial 74F273PC Military Package Number N20A Package.

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Published: May 28, 2005 |