54ABT240 Datasheet | National Semiconductor

Description The ’ABT240 is an inverting octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver which provides improved PC board density. n Guaranteed latchup protection n High impedance glitch free bus loading during entire power up and power down cycle n Nondestructive hot insertion capability n Standard Microcircuit Drawing (SMD) - 5962-9318801 Features n Output sink capability of 48 m A, source capability of 24 m A Ordering Code Military 54ABT240J-QML 54ABT240W-QML 54ABT240E-QML Package Number J20A W20A E20A Package Description 20-Lead Ceramic Dual-In-Line 20-Lead Cerpack 20-Lead Ceramic Leadless Chip Carrier, Type C Connection Diagrams Pin Assignment for DIP and Flatpak Pin Assignment for LCC DS100202-2 DS100202-1 Pin Names OE1, OE2 I0- I7 O0- O7 Description TRI-STATE Output Enable Inputs Inputs Outputs TRI-STATE ® is a registered trademark of National Semiconductor Corporation. © 1998 National Semiconductor Corporation DS100202 .national. Truth Tables Inputs OE1 L L H Inputs OE2 L L H H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance In L H X Outputs (Pins 12, 14, 16, 18) H L Z Outputs (Pins 3, 5, 7, 9) H L Z In L H X .national. Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias Ceramic VCC Pin Potential to Ground Pin Input Voltage (Note 2) Input Current (Note 2) Voltage Applied to Any Output in the Disabled or Power-Off State in the HIGH State - 65˚C to +150˚C - 55˚C to +125˚C - 55˚C to +175˚C - 0.5V to +7.0V - 0.5V to +7.0V - 30 m A to +5.0 m A Current Applied to Output in LOW State (Max) DC Latchup Source Current (Across m Operating Range) Over Voltage Latchup (I/O) twice the rated IOL (m A) - 150 m A 10V Remended...