74LS74A Datasheet | National Semiconductor

Description This device contains two independent positive-edge-triggered D flip-flops with plementary outputs The information on the D input is accepted by the flip-flops on the positive going edge of the clock pulse The triggering occurs at a voltage level and is not directly related to the transition time of the rising edge of the clock The data on the D input may be changed while the clock is low or high without affecting the outputs as long as the data setup and hold times are not violated A low logic level on the preset or clear inputs will set or reset the outputs regardless of the logic levels of the other inputs Features Y Alternate military aerospace device (54LS74) is available Contact a National Semiconductor Sales Office Distributor for specifications Connection Diagram Dual-In-Line Package Function Table TL F 6373 - 1 Order Number 54LS74DMQB 54LS74FMQB 54LS74LMQB DM54LS74AJ DM54LS74AW DM74LS74AM or DM74LS74AN See NS Package Number E20A J14A M14A N14A or W14B Inputs Outputs H u...