DS35F86 Datasheet | National Semiconductor

Description The DS34F86/DS35F86 RS-422/3 Quad Receiver features four independent receivers, which ply with EIA Standards for the electrical characteristics of balanced/ unbalanced voltage digital interface circuits. Receiver outputs are 74LS patible TRI-STATE structures which are forced to a high impedance state when the appropriate output control lead reaches a logic zero condition. A PNP device buffers each output control lead to assure minimum loading for either logic one or logic zero inputs. In addition each receiver has internal hysteresis circuitry to improve noise margin and discourage output instability for slowly changing input waveforms. The DS34F86/DS35F86 offers improved performance due to the use of state-of-the-art L-FAST bipolar technology. The L-FAST technology allows for higher speeds and lower currents by utilizing extremely short gate delay times. Thus, the DS34F86/DS35F86 features lower power, extended temperature range, and improved specifications. The DS34F86/DS35F86 offers optimum performance when used with the DS34F87/DS35F87 Quad Line Driver. Features n n n n n n Military temperature range TRI-STATE outputs Fast propagation times (15 ns typical) TTL patible 5.0V supply Lead patible and interchangeable with MC3486 and DS3486 Connection Diagram 16-Lead DIP DS009616-2 FIGURE 1. Block Diagram DS009616-1 Top View Order Number DS34F86J or DS35F86J See NS Package Number J16A Function Table (Each Receiver) Differential Inputs VID = (VIN+) - (VIN- ) VID ≥ 0.2V VID ≤ - 0.2V X Note 1: H = High Level Note 2: L = Low Level Note 3: Z = High Impedance (off) Enable E H H L Output OUT H L Z TRI-STATE ® is a registered trademark of National Semiconductor Corporation. © 1997 National Semiconductor Corporation DS009616 .national. Print Date=1997/04/25 Print Time=10:08:01 5859 ds009616 Rev. No. 1 Proof 1 http://.. Absolute Maximum Ratings (Note 5) If Military/Aerospace specified devices are required, please contact the National Semiconductor...