DS3862 Datasheet | National Semiconductor

Description The DS3862 is an octal high speed schottky bus transceiver intended for use with terminated 120Ω impedance lines. It is specifically designed to reduce noise in unbalanced transmission systems. The open collector drivers generate precise trapezoidal waveforms with rise and fall times of 9 ns (typical), which are relatively independent of capacitive loading conditions on the outputs. This reduces noise coupling to the adjacent lines without any appreciable impact on the maximum data rate obtainable with high speed bus transceivers. In addition, the receivers use a low pass filter in conjunction with a high speed parator, to further enhance the noise immunity. Tightly controlled threshold levels on the receiver provide equal rejection to both negative and positive going noise pulses on the bus. The external termination is intended to be a 180Ω resistor from the bus to 5V logic supply, together with a 390Ω resistor from the bus to ground. The bus can be terminated at one or both ends. Features n Guaranteed A.C. specifications on noise immunity and propagation delay over the specified temperature and supply voltage range n Temperature insensitive receiver thresholds track bus logic level and respond symmetrically to positive and negative going pulses n Trapezoidal bus waveforms reduce noise coupling to adjacent lines n Open collector driver output allows wire-or connection n Advanced low power schottky technology n Glitch free power up/down protection on driver and receiver outputs n TTL patible driver and control inputs, and receiver outputs n Control logic is the same as the DS3896 Logic and Connection Diagram DS008539-1 Order Number DS3862J, DS3862N or DS3862WM See NS Package Number J20A, N20A or M20B © 1999 National Semiconductor Corporation DS008539 .national. Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and...