SM8212B Description
Pin number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Pin name BS1 BS2 BS3 SIGNAL XVSS XT XTN VSS CLKO RSTN AREA SCK SDO SDI.
SM8212B Key Features
- Conforms to POCSAG standard for pagers
- 512, 1200 or 2400 bps signal speed
- Multiframe patible (each address individually controllable)
- 8 addresses × 4 sub-address (total of 32 addresses) control
- Built-in buffer memory
- Supports tone, numeric or character call messages
- Built-in input signal filter, with filter ON/OFF and 4 selectable filter characteristics
- PLL-patible battery saving method (BS1, BS2, BS3 outputs)
- BS1 (RF control main output signal) 61-step setup time setting
- BS3 (PLL setup signal) 61-step setup time setting