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74LVC573A Datasheet Low-voltage CMOS Octal Transparent Latch

Manufacturer: onsemi

Overview: 74LVC573A Low-Voltage CMOS Octal Transparent Latch With 5 V−Tolerant Inputs and Outputs (3−State, Non−Inverting) The 74LVC573A is a high performance, non−inverting octal transparent latch operating from a 1.2 to 3.6 V supply. High impedance TTL patible inputs significantly reduce current loading to input drivers while TTL patible outputs offer improved switching noise performance. A VI specification of 5.5 V allows 74LVC573A inputs to be safely driven from 5 V devices. The 74LVC573A contains 8 D−type latches with 3−state outputs. When the Latch Enable (LE) input is HIGH, data on the Dn inputs enters the latches. In this condition, the latches are transparent, i.e., a latch output will change state each time its D input changes. When LE is LOW, the latches store the information that was present on the D inputs a setup time preceding the HIGH−to−LOW transition of LE. The 3−state standard outputs are controlled by the Output Enable (OE) input. When OE is LOW, the standard outputs are enabled. When OE is HIGH, the standard outputs are in the high impedance state, but this does not interfere with new data entering into the latches.

Key Features

  • Designed for 1.2 to 3.6 V VCC Operation.
  • 5 V Tolerant.
  • Interface Capability With 5 V TTL Logic.
  • Supports Live Insertion and Withdrawal.
  • IOFF Specification Guarantees High Impedance When VCC = 0 V.
  • 24 mA Output Sink and Source Capability.
  • Near Zero Static Supply Current in all Three Logic States (10 mA) Substantially Reduces System Power Requirements.
  • ESD Performance:.
  • Human Body Model >2000 V.
  • Machine Mode.

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74LVC573A Distributor