Datasheet4U Logo Datasheet4U.com

74VHC74 - Dual D-Type Flip-Flop

Description

The VHC74 is an advanced high speed CMOS Dual D-Type Flip-Flop fabricated with silicon gate CMOS technology.

It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation.

Features

  • High Speed: fMAX = 170MHz (typ. ) at TA = 25°C.
  • High noise immunity: VNIH = VNIL = 28% VCC (min. ).
  • Power down protection is provided on all inputs.
  • Low power dissipation: ICC = 2µA (max. ) at TA = 25°C.
  • Pin and function compatible with 74HC74 General.

📥 Download Datasheet

Datasheet preview – 74VHC74

Datasheet Details

Part number 74VHC74
Manufacturer ON Semiconductor
File Size 426.13 KB
Description Dual D-Type Flip-Flop
Datasheet download datasheet 74VHC74 Datasheet
Additional preview pages of the 74VHC74 datasheet.

📁 Similar Datasheet

  • 74VHC74 - Dual D-Type Flip-Flop (STMicroelectronics)
  • 74VHC74 - Dual D-Type Flip-Flop (Fairchild Semiconductor)
  • 74VHC00 - QUAD 2-INPUT NAND GATE (STMicroelectronics)
  • 74VHC00 - Quad 2-Input NAND Gate (Fairchild Semiconductor)
  • 74VHC02 - QUAD 2-INPUT NOR GATE (STMicroelectronics)
  • 74VHC02 - Quad 2-Input NOR Gate (Fairchild Semiconductor)
  • 74VHC02 - Quad 2-input NOR gate (NXP)
  • 74VHC02 - Quad 2-input NOR gate (nexperia)
  • 74VHC02-Q100 - Quad 2-input NOR gate (NXP)
  • 74VHC02-Q100 - Quad 2-input NOR gate (nexperia)
Other Datasheets by ON Semiconductor

Full PDF Text Transcription

Click to expand full text
74VHC74 — Dual D-Type Flip-Flop with Preset and Clear 74VHC74 Dual D-Type Flip-Flop with Preset and Clear Features ■ High Speed: fMAX = 170MHz (typ.) at TA = 25°C ■ High noise immunity: VNIH = VNIL = 28% VCC (min.) ■ Power down protection is provided on all inputs ■ Low power dissipation: ICC = 2µA (max.) at TA = 25°C ■ Pin and function compatible with 74HC74 General Description The VHC74 is an advanced high speed CMOS Dual D-Type Flip-Flop fabricated with silicon gate CMOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The signal level applied to the D input is transferred to the Q output during the positive going transition of the CK pulse.
Published: |