Datasheet4U Logo Datasheet4U.com

MC100EP35 - JK Flip-Flop

Description

EL35 JK flip-flop.

The J/K data enters the master portion of the flip-flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the clock.

Features

  • 410 ps Propagation Delay.
  • Maximum Frequency > 3 GHz Typical.
  • PECL Mode Operating Range:.
  • VCC = 3.0 V to 5.5 V with VEE = 0 V.
  • NECL Mode Operating Range:.
  • VCC = 0 V with VEE =.
  • 3.0 V to.
  • 5.5 V.
  • Open Input Default State.
  • Q Output Will Default LOW with Inputs Open or at VEE.
  • These Devices are Pb-Free, Halogen Free and are RoHS Compliant www. onsemi. com 8 1 SOIC.
  • 8 NB D SUFFIX CASE 751.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
MC100EP111 LOW-VOLTAGE 1:10 DIFFERENTIAL ECL/PECL CLOCK DRIVER Motorola
MC100EP221 LOW-VOLTAGE 1:20 DIFFERENTIAL ECL/PECL CLOCK DRIVER Motorola
MC100EP223 Low Voltage 1:22 Differential PECL/HSTL Clock Driver Motorola Semiconductor
MC100E016 8-Bit Synchronous Binary Up Counter Motorola
MC100E101 Quad 4-Input OR/NOR Gate Motorola

Other Datasheets by onsemi

Part Number Description
MC100EP31 3.3V / 5V ECL D Flip-Flop
MC100EP32 Divider
MC100EP33 3.3V 5VECL / 4 Divider
MC100EP01 3.3V / 5V ECL 4-Input OR/NOR
MC100EP016 3.3V / 5VECL 8-Bit Synchronous Binary Up Counter

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
MC10EP35, MC100EP35 3.3 V / 5 V ECL JK Flip‐Flop Description The MC10/100EP35 is a higher speed/low voltage version of the EL35 JK flip-flop. The J/K data enters the master portion of the flip-flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the clock. The reset pin is asynchronous and is activated with a logic HIGH. The 100 Series contains temperature compensation. Features • 410 ps Propagation Delay • Maximum Frequency > 3 GHz Typical • PECL Mode Operating Range: ♦ VCC = 3.0 V to 5.5 V with VEE = 0 V • NECL Mode Operating Range: ♦ VCC = 0 V with VEE = −3.0 V to −5.5 V • Open Input Default State • Q Output Will Default LOW with Inputs Open or at VEE • These Devices are Pb-Free, Halogen Free and are RoHS Compliant www.onsemi.
Published: |