MC100LVEP14 - 2.5V / 3.3V 1:5 Differential ECL/PECL/HSTL Clock Driver

onsemi

General Description

The MC100LVEP14 is a low skew 1 to

with clock distribution in mind, accepting two clock sources into an input multiplexer.

ended (if the VBB output is used).

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MC100LVEP14 2.5v / 3.3v 1:5 differential ecl/pecl/hstl clock driver by onsemi - Datasheet Preview

Datasheet Details

Part number	MC100LVEP14
Manufacturer	onsemi
File Size	84.26 KB
Description	2.5V / 3.3V 1:5 Differential ECL/PECL/HSTL Clock Driver
Datasheet	MC100LVEP14 Datasheet

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Other Datasheets by onsemi

Part Number	Description
MC100LVEP11	2.5V / 3.3V ECL 1:2 Differential Fanout Buffer
MC100LVEP111	2.5V / 3.3V 2:1:10 Differential ECL/PECL/HSTL Clock Driver
MC100LVEP16	2.5V / 3.3V ECL Differential Receiver/Driver
MC100LVEP05	2.5V / 3.3V ECL 2-Input Differential AND/NAND
MC100LVEP210	2.5V / 3.3V 1:5 Dual Differential ECL/PECL/HSTL Clock Driver

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MC100LVEP14 2.5V / 3.3V 1:5 Differential ECL/PECL/HSTL Clock Driver Description The MC100LVEP14 is a low skew 1−to−5 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The ECL/PECL input signals can be either differential or single−ended (if the VBB output is used). HSTL inputs can be used when the LVEP14 is operating under PECL conditions. The LVEP14 specifically guarantees low output−to−output skew. Optimal design, layout, and processing minimize skew within a device and from device to device. To ensure that the tight skew specification is realized, both sides of any differential output need to be terminated identically into 50 W even if only one output is being used.