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MC10H607 - Registered Hex PECL/TTL Translator

General Description

The MC10H/100H607 is a 6

translator.

Key Features

  • differential PECL inputs for both data and clock. The TTL outputs feature 48 mA sink, 24 mA source drive capability for driving high fanout loads or transmission lines. The asynchronous master reset control is an ECL level input. With its differential PECL inputs and TTL outputs the H607 device is ideally suited for the receive function of a HPPI bus type board.
  • to.
  • board interface.

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Datasheet Details

Part number MC10H607
Manufacturer onsemi
File Size 107.67 KB
Description Registered Hex PECL/TTL Translator
Datasheet download datasheet MC10H607 Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MC10H607, MC100H607 Registered Hex PECL to TTL Translator Description The MC10H/100H607 is a 6−bit, registered PECL to TTL translator. The device features differential PECL inputs for both data and clock. The TTL outputs feature 48 mA sink, 24 mA source drive capability for driving high fanout loads or transmission lines. The asynchronous master reset control is an ECL level input. With its differential PECL inputs and TTL outputs the H607 device is ideally suited for the receive function of a HPPI bus type board−to−board interface application. The on chip registers simplify the task of synchronizing the data between the two boards. The device is available in either ECL standard: the 10H device is compatible with MECL 10H™ logic levels, with a VCC of +5.