MC74HC390A Datasheet | onsemi

DATA SHEET .onsemi. Dual 4-Stage Binary Ripple Counter with  2 and  5 Sections High- Performance Silicon- Gate CMOS The MC74HC390A is identical in pinout to the LS390. The device inputs are patible with standard CMOS outputs; with pullup resistors, they are patible with LSTTL outputs. This device consists of two independent 4- bit counters, each posed of a divide- by- two and a divide- by- five section. The divide- by- two and divide- by- five counters have separate clock inputs, and can be cascaded to implement various binations of  2 and/or  5 up to a  100 counter. Flip- flops internal to the counters are triggered by high- to- low transitions of the clock input. A separate, asynchronous reset is provided for each 4- bit counter. State changes of the Q outputs do not occur simultaneously because of internal ripple delays. Therefore, decoded output signals are subject to decoding spikes and should not be used as clocks or strobes except when gated with the Clock of the HC390A. Features - Output Drive Capability: 10 LSTTL Loads - Outputs Directly Interface to CMOS, NMOS, and TTL - Operating Voltage Range: 2.0 to 6.0 V - Low Input Current: 1 m A - High Noise Immunity Characteristic of CMOS Devices - In pliance with the Requirements Defined by JEDEC Standard No 7 A - Chip plexity: 244 FETs or 61 Equivalent Gates - - Q Suffix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC- Q100 Qualified and PPAP Capable - These Devices are Pb- Free, Halogen Free/BFR Free and are Ro HS pliant CLOCK A 1, 15 2 COUNTER 3, 13 QA CLOCK B 4, 12 5 COUNTER 5, 11 QB 6, 10 7, 9 QC QD RESET 2, 14 Figure 1. Logic Diagram PIN 16 = VCC PIN 8 = GND  Semiconductor ponents Industries, LLC,...