Datasheet4U Logo Datasheet4U.com

NB6L239 - 2.5V / 3.3V Any Differential Clock IN to Differential LVPECL OUT Clock Divider

General Description

The NB6L239 is a high

divider circuits, each having selectable clock divide ratios; B1/2/4/8 and B2/4/8/16.

Both divider circuits drive a pair of differential LVPECL outputs.

(More device information on page 7).

Key Features

  • Maximum Clock Input Frequency, 3.0 GHz.
  • CLOCK Inputs Compatible with LVDS/LVPECL/CML/HSTL/HCSL.
  • EN, MR, and SEL Inputs Compatible with LVTTL/LVCMOS.
  • Rise/Fall Time 65 ps Typical.
  • < 10 ps Typical Output.
  • to.
  • Output Skew.
  • Example: 622.08 MHz Input Generates 38.88 MHz to 622.08 MHz Outputs.
  • Internal 50 W Termination Provided.
  • Random Clock Jitter < 1 ps RMS.
  • QA B1 Edge Aligned to QBBn Edge.
  • Opera.

📥 Download Datasheet

Datasheet Details

Part number NB6L239
Manufacturer onsemi
File Size 143.52 KB
Description 2.5V / 3.3V Any Differential Clock IN to Differential LVPECL OUT Clock Divider
Datasheet download datasheet NB6L239 Datasheet

Other Datasheets by onsemi

Part Number Description
NB6L295 2.5V / 3.3V Dual Channel Programmable Clock/Data Delay
NB6L295M 2.5V / 3.3V Dual Channel Programmable Clock/Data Delay
NB6L11 2.5V / 3.3V MULTILEVEL INPUT TO DIFFERENTIAL LVPECL/LVNECL
NB6L11M Differential CML Fanout Buffer
NB6L11S Input to LVDS Fanout Buffer/Translator
NB6L14 Differential 1:4 LVPECL Fanout Buffer
NB6L14M Differential 1:4 CML Fanout Buffer
NB6L14S 2.5V 1:4 AnyLevel Differential Input to LVDS Fanout Buffer/Translator
NB6L16 6GHz/6Gbps 2.5V/3.3V Multi-level Input to Differential Lvecl Clock or Data Translator/receiver/driver Buffer
NB6L56 2.5V / 3.3V Dual 2:1 Differential Clock / Data Multiplexer

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
NB6L239 2.5V / 3.3V Any Differential Clock IN to Differential LVPECL OUT ÷1/2/4/8, ÷2/4/8/16 Clock Divider Description The NB6L239 is a high−speed, low skew clock divider with two divider circuits, each having selectable clock divide ratios; B1/2/4/8 and B2/4/8/16. Both divider circuits drive a pair of differential LVPECL outputs. (More device information on page 7). The NB6L239 is a member of the ECLinPS MAX™ Family of the high performance clock products. Features • Maximum Clock Input Frequency, 3.0 GHz • CLOCK Inputs Compatible with LVDS/LVPECL/CML/HSTL/HCSL • EN, MR, and SEL Inputs Compatible with LVTTL/LVCMOS • Rise/Fall Time 65 ps Typical • < 10 ps Typical Output−to−Output Skew • Example: 622.08 MHz Input Generates 38.88 MHz to 622.