| Part number | NB6LQ572 |
|---|---|
| Datasheet | NB6LQ572_ONSemiconductor.pdf |
| File Size | 220.14 KB |
| Manufacturer | onsemi |
| Description | 2.5V / 3.3V Differential 4:1 Mux w/Input Equalizer to 1:2 LVPECL Clock/Data Fanout / Translator |
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Each INx/INx input pair incorporates a fixed Equalizer Receiver, which when placed in series with a Clock / Data path, will enhance the degraded signal transmitted across an FR4 backplane or cable interconnect. For applications that do not require Equalization, consider the NB6L572, which is pin−patible to the NB6LQ572. The differential Clock / Data inputs have internal 50 W termination resistors and will accept...
| Part Number | Description |
|---|---|
| NB6LQ572M | 2.5V / 3.3V Differential 4:1 Mux w/Input Equalizer to 1:2 CML Clock/Data Fanout / Translator |
| NB6L11 | 2.5V / 3.3V MULTILEVEL INPUT TO DIFFERENTIAL LVPECL/LVNECL |
| NB6L11M | Differential CML Fanout Buffer |
| NB6L11S | Input to LVDS Fanout Buffer/Translator |
| NB6L14 | Differential 1:4 LVPECL Fanout Buffer |
| NB6L14M | Differential 1:4 CML Fanout Buffer |
| NB6L14S | 2.5V 1:4 AnyLevel Differential Input to LVDS Fanout Buffer/Translator |
| NB6L16 | 6GHz/6Gbps 2.5V/3.3V Multi-level Input to Differential Lvecl Clock or Data Translator/receiver/driver Buffer |
| NB6L239 | 2.5V / 3.3V Any Differential Clock IN to Differential LVPECL OUT Clock Divider |
| NB6L295 | 2.5V / 3.3V Dual Channel Programmable Clock/Data Delay |
