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NB6N11S - Input to LVDS Fanout Buffer/Translator

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Part number NB6N11S
Manufacturer ON Semiconductor
File Size 314.24 KB
Description Input to LVDS Fanout Buffer/Translator
Datasheet download datasheet NB6N11S Datasheet
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Description

The NB6N11S is a differential 1:2 Clock or Data Receiver and will accept AnyLevel input signals: LVPECL, CML, LVCMOS, LVTTL, or LVDS.These signals will be translated to LVDS and two identical copies of Clock or Data will be distributed, operating up to 2.0 GHz or 2.5 Gb/s, respectively.As such, the NB6N11S is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock or Data distribution applications.The NB6N11S has a wide input common mode range from GND + 50 mV to VCC 50 mV.

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Other Datasheets by ON Semiconductor
  • NB6N14S - Differential Input to LVDS Fanout Buffer/Translator
  • NB6N239S - 3.3 V, 3.0 GHz Any Differential Clock IN to LVDS OUT Clock Divider
  • NB6HQ14M - 2.5V 5GHz / 6.5Gbps Differential Input to 1.8V / 2.5V 1:4 CML Clock / Data Fanout Buffer
  • NB6L11 - 2.5V / 3.3V MULTILEVEL INPUT TO DIFFERENTIAL LVPECL/LVNECL
  • NB6L11M - Differential CML Fanout Buffer
  • NB6L11S - Input to LVDS Fanout Buffer/Translator
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