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NB6N239S - 3.3 V, 3.0 GHz Any Differential Clock IN to LVDS OUT Clock Divider

Datasheet Summary

Description

The NB6N239S is a high

divider circuits, each having selectable clock divide ratios; B1/2/4/8 and B2/4/8/16.

Both divider circuits drive LVDS compatible outputs.

(More device information on page 7).

Features

  • Maximum Clock Input Frequency, 3.0 GHz (1.5 GHz with B1).
  • Input Compatibility with LVDS/LVPECL/CML/HSTL/HCSL.
  • Rise/Fall Time 120 ps Typical.
  • < 5 ps Typical Within Device Output Skew.
  • Example; 622.08 MHz Input Generates 38.88 MHz to 622.08 MHz Outputs.
  • Internal 50 W Termination Provided.
  • Random Clock Jitter < 2 ps RMS.
  • QA B1 Edge Aligned to QB Bn Edge.
  • Operating Range: VCC = 3.0 V to 3.465 V with GND = 0 V.

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Datasheet Details

Part number NB6N239S
Manufacturer ON Semiconductor
File Size 143.87 KB
Description 3.3 V, 3.0 GHz Any Differential Clock IN to LVDS OUT Clock Divider
Datasheet download datasheet NB6N239S Datasheet
Additional preview pages of the NB6N239S datasheet.

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Full PDF Text Transcription

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NB6N239S 3.3 V, 3.0 GHz Any Differential Clock IN to LVDS OUT ÷1/2/4/8, ÷2/4/8/16 Clock Divider Description The NB6N239S is a high−speed, low skew clock divider with two divider circuits, each having selectable clock divide ratios; B1/2/4/8 and B2/4/8/16. Both divider circuits drive LVDS compatible outputs. (More device information on page 7). The NB6N239S is a member of the ECLinPS MAX™ family of high performance clock products. Features • Maximum Clock Input Frequency, 3.0 GHz (1.5 GHz with B1) • Input Compatibility with LVDS/LVPECL/CML/HSTL/HCSL • Rise/Fall Time 120 ps Typical • < 5 ps Typical Within Device Output Skew • Example; 622.08 MHz Input Generates 38.88 MHz to 622.
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