NB6N239S Description
The NB6N239S is a high−speed, low skew clock divider with two divider circuits, each having selectable clock divide ratios; Both divider circuits drive LVDS patible outputs. (More device information on page 7).
NB6N239S Key Features
- Maximum Clock Input Frequency, 3.0 GHz (1.5 GHz with B1)
- Input patibility with LVDS/LVPECL/CML/HSTL/HCSL
- Rise/Fall Time 120 ps Typical
- < 5 ps Typical Within Device Output Skew
- Example; 622.08 MHz Input Generates 38.88 MHz to 622.08 MHz
- Internal 50 W Termination Provided
- Random Clock Jitter < 2 ps RMS
- QA B1 Edge Aligned to QB Bn Edge
- Operating Range: VCC = 3.0 V to 3.465 V with GND = 0 V
- Master Reset for Synchronization of Multiple Chips