NCP5210 Datasheet | onsemi

3- in- 1 PWM Dual Buck and Linear DDR Power Controller The NCP5210, 3- in- 1 PWM Dual Buck and Linear DDR Power Controller, is a plete power solution for MCH and DDR memory. This IC bines the efficiency of PWM controllers for the VDDQ supply and the MCH core supply voltage with the simplicity of linear regulator for the VTT termination voltage. This IC contains two synchronous PWM buck controller for driving four external N- Ch FETs to form the DDR memory supply voltage (VDDQ) and the MCH regulator. The DDR memory termination regulator (VTT) is designed to track at the half of the reference voltage with sourcing and sinking current. Protective Features include, soft- start circuitry, undervoltage monitoring of 5VDUAL and BOOT voltage, and thermal shutdown. The device is housed in a thermal enhanced space- saving QFN- 20 package. Features - Incorporates Synchronous PWM Buck Controllers for VDDQ and VMCH - Integrated Power FETs with VTT Regulator Source/Sink up to 2.0 A - All External Power MOSFETs are N- Channel - Adjustable VDDQ and VMCH by External Dividers - VTT Tracks at Half the Reference Voltage - Fixed Switching Frequency of 250 k Hz for VDDQ and VMCH - Doubled Switching Frequency of 500 k Hz for VDDQ Controller in Standby Mode to Optimize Inductor Current Ripple and Efficiency - Soft- Start Protection for all Controllers - Undervoltage Monitor of Supply Voltages - Overcurrent Protections for DDQ and VTT Regulators - Fully plies with ACPI Power Sequencing Specifications - Short Circuit Protection Prevents Damage to Power Supply Due to Reverse DIMM Insertion - Thermal Shutdown - 5x6 QFN- 20 Package - Pb- Free Package is Available- Applications - DDR I and DDR II Memory and MCH Power Supply - For additional information on our Pb- Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi. MARKING DIAGRAM QFN- 20 AWLYYWW MN SUFFIX CASE...