SN74LS109 Description
SN74LS109A Dual JK Positive Edge-Triggered Flip-Flop The SN74LS109A consists of two high speed pletely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip-flop by simply connecting the J and K pins together.
SN74LS109 Key Features
- K X X X h h
- l Q H L H H q q L Q L H H L q q H OUTPUTS LOW POWER SCHOTTKY 16 1 Both outputs will be HIGH while both SD a