Download FDG8842CZ Datasheet PDF
FDG8842CZ page 2
Page 2
FDG8842CZ page 3
Page 3

FDG8842CZ Description

These N & P-Channel logic level enhancement mode field effect transistors are produced using ON Semiconductor’s proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. This device has been designed especially for low voltage applica-tions as a replacement for bipolar digital transistors and small signal MOSFETs.

FDG8842CZ Key Features

  • Max rDS(on) = 0.4Ω at VGS = 4.5V, ID = 0.75A
  • Max rDS(on) = 0.5Ω at VGS = 2.7V, ID = 0.67A Q2: P-Channel
  • Max rDS(on) = 1.1Ω at VGS = -4.5V, ID = -0.41A
  • Max rDS(on) = 1.5Ω at VGS = -2.7V, ID = -0.25A
  • Very low level gate drive requirements allowing direct
  • Very small package outline SC70-6
  • RoHS pliant
  • Continuous
  • Pulsed
  • 55 to +150