SN74LS109A Description
SN74LS109A Dual JK Positive Edge−Triggered Flip−Flop The SN74LS109A consists of two high speed pletely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip-flop by simply connecting the J and K pins together.
SN74LS109A Key Features
- h q q H H h
- q q H H
- l L H * Both outputs will be HIGH while both SD and CD are LOW, but the output states are unpredictable if