PM5316 Overview
Key Features
- Provides integrated clock recovery and clock synthesis for direct interfacing with optical modules
- Provides Time Slot Interchange (TSI) function at the Telecom Add and Drop buses for grooming 12 STS-1 (STM-0/AU-3) paths
- Provides a standard 5 signal P1149.1 JTAG test port for boundary scan board test purposes
- Provides a generic 8-bit microprocessor bus interface for configuration, control, and status monitoring
- Low power 3.3 V CMOS with TTL compatible digital inputs an